The invention relates to a transistor circuit arrangement having:
an output transistor having an emitter, a base and a collector,
a driver transistor having an emitter, a base and a collector and having its emitter coupled to the base of the output transistor, and
a limiting transistor having an emitter, a base and a collector and having its emitter coupled to the collector of the output transistor, and having its collector coupled to the base of the driver transistor for limiting a drive current applied to the base of the driver transistor.
Such an arrangement is known from U.S. Pat. No. 4,583,051, FIG. 4 and is inter alia suitable for use in power output stages of motor drives.
In output stages for driving motors the output transistors are driven into saturation, so that substantially the entire power-supply voltage is available across the motor. The current to be supplied to the motor may vary substantially depending on the mechanical load of the motor. In order to ensure that the output transistor remains saturated for the rated maximum load current and for the minimum current gain of the output stage, this stage is driven with a certain surplus of input current. This surplus is proportionally largest if the current to be supplied to the load by the output stage is small. FIGS. 3 and 4 of the aforementioned U.S. Patent show commonly used prior art output stages which comprise a driver transistor and an output transistor. The input current of the output stage is applied to the base of the driver transistor of the output stage. In a first known output stage the emitter of the driver transistor is connected to the base of the output transistor and the collector of the driver transistor is connected to a fixed supply voltage. In a second known output stage, the Darlington output stage, the collector of the driver transistor is connected to the collector of the output transistor. In each of the two known output stages the load is connected between the collector of the output transistor and a supply voltage. The emitter of the output transistor is connected to a supply voltage which is lower in the case of NPN transistors. If the load current of the output stage is always small the second output stage of the Darlington type is to be preferred on account of the low heat dissipation in the driver transistor. Indeed, the collector of the driver transistor is connected to the low output voltage of the output stage. Even the surplus of input current, which flows through the driver transistor after being amplified, does not give rise to any dissipation problems. Generally, the collector of the driver transistor in the first output stage will be connected to a much higher voltage and will dissipate more heat under otherwise similar conditions. It is the comparatively large overdrive of the output stage for small output current which causes a significant dissipation in the driver transistor of the first output stage. If the load current of the output stage is always large the first output stage is to be preferred on account of the substantially smaller voltage drop across the output transistor. The dissipation in the output stage is now dictated almost entirely by the heat developed in the output transistor. Under these conditions the dissipation in the driver transistor is of subordinate importance.
Without further steps the known output stages, which are driven into saturation, do not allow the head dissipation in the output stage to be minimized both for large and small load currents.
In the known transistor arrangement the heat dissipation in the driver transistor of the output stage, which is of the first type, can be reduced for small load currents by preventing the output transistor from being driven unnecessarily far into saturation. In that case the driver transistor need not supply an unnecessarily large amount of current to the base of the output transistor, which reduces the dissipation in the driver transistor. This is achieved by draining a part of the total input current of the output stage from the base of the driver transistor by means of a series arrangement of a diode-connected limiting transistor and a Schottky diode between the base of the driver transistor and the collector of the output transistor. As soon as the collector-emitter voltage decreases below a specific value, the series arrangement will drain the surplus input current.
When the known transistor arrangement is integrated additional process steps are necessary to fabricate the Schottky diode, which renders the integrated transistor arrangement more intricate.